BEOL process integration with Cu/SiCOH (k=2.8) low-k interconnects at 65 nm groundrules
- M. Fukasawa
- S. Lane
- et al.
- 2005
- IITC 2005
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41 results for F. Chen
Lower-k SiCOH integration for 65 nm ground rules
- T. Nogami
- S. Lane
- et al.
- 2005
- VMIC 2005
Low-k/copper integration scheme suitable for ULSI manufacturing from 90nm to 45nm nodes
- T. Nogami
- S. Lane
- et al.
- 2005
- Optics East 2005
Thermal oxidation of Cu interconnects capped with CoWP
- J.P. Gambino
- S. Smith
- et al.
- 2005
- MRS Spring Meeting 2005
Electrical and reliability evaluation of Cu/Low-k integration: Exploration of PVD barrier/seed and CVD SiC(N,H) cap depositions
- C.-C. Yang
- D. Edelstein
- et al.
- 2004
- ADMETA 2004
Comprehensive reliability evaluation of a 90 nm CMOS technology with Cu/PECVD low-k BEOL
- D. Edelstein
- H.S. Rathore
- et al.
- 2004
- IRPS 2004
Measurements of effective thermal conductivity for advanced interconnect structures with various composite low-K dielectrics
- F. Chen
- J. Gill
- et al.
- 2004
- IRPS 2004
Measurements of effective thermal conductivity for advanced interconnect structures with various composite low-k dielectrics
- F. Chen
- J. Gill
- et al.
- 2004
- IRPS 2004
Comprehensive reliability evaluation of a 90 nm CMOS technology with Cu/PECVD low-k BEOL
- D. Edelstein
- H.S. Rathore
- et al.
- 2004
- IRPS 2004
Novel techniques for scaling deep trench DRAM capacitor technology to 0.11 μm and beyond
- P.S. Parkinson
- K. Settlemyer
- et al.
- 2003
- VLSI-TSA 2003