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A novel ALD SiBCN low-k spacer for parasitic capacitance reduction in FinFETsTenko YamashitaS. Mehtaet al.2015VLSI Technology 2015
Atomic layer deposition of sidewall spacers: Process, equipment and integration challenges in state-of-the-art logic technologiesMichael BelyanskyRichard Contiet al.2014ECS Meeting 2014