Off-state self-heating, micro-hot-spots, and stress-induced device considerations in scaled technologies
- Siyu Koswatta
- N. Mavilla
- et al.
- 2015
- IEDM 2015
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9 results for S. Mittl
A high performance 90 nm SOI technology with 0.992 μm2 6T-SRAM cell
- Mukesh Khare
- S. Ku
- et al.
- 2002
- IEDM 2002
Impact of 3D copper TSV integration on 32SOI FEOL and BEOL reliability
- Mukta Farooq
- Giuseppe La Rosa
- et al.
- 2015
- IRPS 2015
Deposited ALD SiO2 high-k/metal gate interface for high voltage analog and I/O devices on next generation alternative channels and FINFET device structures
- S. Siddiqui
- M.M. Chowdhury
- et al.
- 2013
- ECS Meeting 2013
A robust reliability methodology for accurately predicting Bias Temperature Instability induced circuit performance degradation in HKMG CMOS
- D.P. Ioannou
- K. Zhao
- et al.
- 2011
- IRPS 2011
Post-breakdown statistics and acceleration characteristics in high-K dielectric stacks
- Ernest Wu
- Jordi Sune
- et al.
- 2011
- IRPS 2011
PBTI response to interfacial layer thickness variation in Hf-based HKMG nFETs
- D.P. Ioannou
- E. Cartier
- et al.
- 2010
- IRPS 2010
High performance 32nm SOI CMOS with high-k/metal gate and 0.149μm 2 SRAM and ultra low-k back end with eleven levels of copper
- B. Greene
- Q. Liang
- et al.
- 2009
- VLSI Technology 2009
The combined effects of deuterium anneals and deuterated barrier-nitride processing on hot-electron degradation in MOSFET's
- Thomas G. Ference
- Jay S. Burnham
- et al.
- 1999
- IEEE Transactions on Electron Devices