A 6+ GHz 128KB Multi-Port L1 Cache using Ground Rule Clean 10T Bitcells in 5nm TechnologyRajiv JoshiJohn Daviset al.2025VLSI Technology and Circuits 2025
Cores, Cache, Content, and Characterization: IBM’s Second Generation 14-nm Product, z15David WolpertChris Berryet al.2020IEEE JSSC