Cell architecture: Key physical design features and methodology
- Jim Kahle
- 2007
- ISPD 2007
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20 results for Jim Kahle
Key features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor
- Dac Pham
- Hans-Werner Anderson
- et al.
- 2006
- ASP-DAC 2006
The design methodology and implementation of a first-generation CELL processor: A multi-core SoC
- D.C. Pham
- E. Behnen
- et al.
- 2005
- CICC 2005
The design and implementation of a first-generation CELL processor - A multi-core SoC
- D.C. Pham
- S. Asano
- et al.
- 2005
- ICICDT 2005
IBM second-generation RISC machine organization
- H.B. Bakoglu
- G.F. Grohoski
- et al.
- 1990
- COMPCON 1990
IBM second-generation RISC machine organization
- H.B. Bakoglu
- G.F. Grohoski
- et al.
- 1989
- ICCD 1989
POWER7™, a highly parallel, scalable multi-core high end server processor
- Dieter F. Wendel
- Ron Kalla
- et al.
- 2011
- IEEE Journal of Solid-State Circuits
Overview of the architecture, circuit design, and physical implementation of a first-generation cell processor
- D.C. Pham
- T. Aipperspach
- et al.
- 2006
- IEEE Journal of Solid-State Circuits
Introduction to the cell multiprocessor
- James A. Kahle
- Michael N. Day
- et al.
- 2005
- IBM J. Res. Dev
A 2.2 W, 80 MHz Superscalar RISC Microprocessor
- Gian Gerosa
- Carl Dietz
- et al.
- 1994
- IEEE Journal of Solid-State Circuits