System-on-Package (SOP) technology, characterization and applications
- J. Knickerbocker
- P. Andry
- et al.
- 2006
- ECTC 2006
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55 results for Paul Andry
Characterization of micro-bump C4 interconnects for Si-carrier SOP applications
- S.L. Wright
- R.J. Polastre
- et al.
- 2006
- ECTC 2006
Pb-free micro-joints (50 μm pitch) for the next generation micro-systems: The fabrication, assembly and characterization
- H. Gan
- S.L. Wright
- et al.
- 2006
- ECTC 2006
Structure, design and process control for Cu bonded interconnects in 3D integrated circuits
- Kuan-Neng Chen
- Sang Hwui Lee
- et al.
- 2006
- IEDM 2006
3-D silicon integration and silicon packaging technology using silicon through-vias
- John U. Knickerbocker
- Chirag S. Patel
- et al.
- 2006
- IEEE Journal of Solid-State Circuits
Silicon carrier with deep through-vias, fine pitch wiring, and through cavity for parallel optical transceiver
- Chirag S. Patel
- Cornelia K. Tsang
- et al.
- 2005
- ADMETA 2005
Characterization of flip chip microjoins up to 40 GHz using silicon carrier
- Chirag S. Patel
- Paul S. Andry
- et al.
- 2005
- IITC 2005
Silicon carrier with deep through-vias, fine pitch wiring, and through cavity for parallel optical transceiver
- Chirag S. Patel
- Cornelia K. Tsang
- et al.
- 2005
- ECTC 2005
Three dimensional silicon integration using fine pitch interconnection, silicon processing and silicon carrier packaging technology
- John U. Knickerbocker
- Chirag S. Patel
- et al.
- 2005
- CICC 2005
Driving large-sized OLED TVs with an amorphous-silicon backplane
- Takatoshi Tsujimura
- Frank Libsch
- et al.
- 2005
- Journal of the Society for Information Display