56 nm pitch copper dual-damascene interconnects with triple pitch split metal and double pitch split via
- James Hsueh-Chung Chen
- Christopher Waskiewicz
- et al.
- 2012
- IITC 2012
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75 results for Juntao Li
Strain engineered extremely thin SOI (ETSOI) for high-performance CMOS
- A. Khakifirooz
- Kangguo Cheng
- et al.
- 2012
- VLSI Technology 2012
Modifications of growth of strained silicon and dopant activation in silicon by cryogenic ion implantation and recrystallization annealing
- Hiroshi Itokawa
- Nathaniel C. Beriiner
- et al.
- 2012
- IWJT 2012
Scalability of extremely thin SOI (ETSOI) MOSFETs to sub-20-nm gate length
- Ali Khakifirooz
- Kangguo Cheng
- et al.
- 2012
- IEEE Electron Device Letters
Electrolyte additive chemistry and feature size-dependent impurity incorporation for Cu interconnects
- J. Kelly
- Takeshi Nogami
- et al.
- 2012
- JES
Impact of back bias on ultra-thin body and BOX (UTBB) devices
- Q. Liu
- Frederic Monsieur
- et al.
- 2011
- VLSI Technology 2011
Sub-25nm FinFET with advanced fin formation and short channel effect engineering
- Tenko Yamashita
- Veeraraghvan S. Basker
- et al.
- 2011
- VLSI Technology 2011
ETSOI CMOS for system-on-chip applications featuring 22nm gate length, sub-100nm gate pitch, and 0.08μm2 SRAM cell
- Kangguo Cheng
- A. Khakifirooz
- et al.
- 2011
- VLSI Circuits 2011
Full metal gate with borderless contact for 14 nm and beyond
- Soon-Cheon Seo
- L.F. Edge
- et al.
- 2011
- VLSI Technology 2011
ETSOI CMOS for system-on-chip applications featuring 22nm gate length, sub-100nm gate pitch, and 0.08μm2 SRAM cell
- Kangguo Cheng
- A. Khakifirooz
- et al.
- 2011
- VLSI Technology 2011