Virtual de-embedding study for the accurate extraction of Fin FET gate resistance
- Shireen Warnock
- Rob Groves
- et al.
- 2014
- CICC 2014
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8 results for Hongmei Li
Gate stack resistance and limits to CMOS logic performance
- Richard A. Wachnik
- S. Lee
- et al.
- 2013
- CICC 2013
Advanced modeling and optimization of high performance 32nm HKMG SOI CMOS for RF/analog SoC applications
- Sungjae Lee
- J. Johnson
- et al.
- 2012
- VLSI Technology 2012
RF modeling of 45nm low-power CMOS technology
- Jing Wang
- Hongmei Li
- et al.
- 2009
- NSTI-Nanotech 2009
Capacitance investigation of diode and GGNMOS for ESD protection of high frequency circuits in 45nm SOI CMOS technologies
- Junjun Li
- Souvick Mitra
- et al.
- 2008
- EOS/ESD 2008
Capacitance investigation of diodes and SCRs for ESD protection of high frequency circuits in sub-100nm bulk CMOS technologies
- Junjun Li
- Robert Gauthier
- et al.
- 2007
- EOS/ESD 2007
RF characterization and parameter extraction for CMOS device models
- John J. Pekarik
- Basanth Jagannathan
- et al.
- 2007
- SiRF 2007
Gate stack resistance and limits to CMOS logic performance
- Richard A. Wachnik
- Sungjae Lee
- et al.
- 2014
- IEEE TCAS-I