Gate stack resistance and limits to CMOS logic performance
- Richard A. Wachnik
- S. Lee
- et al.
- 2013
- CICC 2013
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3 results for Mai Randall
A fully automated method to create Monte-Carlo MOSFET model libraries for statistical circuit simulations
- Jing Wang
- Henry Trombley
- et al.
- 2012
- NSTI-Nanotech 2012
Gate stack resistance and limits to CMOS logic performance
- Richard A. Wachnik
- Sungjae Lee
- et al.
- 2014
- IEEE TCAS-I