Capacitance investigation of diodes and SCRs for ESD protection of high frequency circuits in sub-100nm bulk CMOS technologies
- Junjun Li
- Robert Gauthier
- et al.
- 2007
- EOS/ESD 2007
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27 results for Junjun Li
Failure analysis of I/O with ESD protection devices in advanced CMOS technologies
- Mujahid Muhammad
- Robert Gauthier
- et al.
- 2007
- IPFA 2007
Design and characterization of a multi-rc-triggered MOSFET-based power clamp for on-chip ESD protection
- Junjun Li
- Robert Gauthier
- et al.
- 2006
- EOS/ESD 2006
Analysis of failure mechanism on gate-silicided and gate-non-silicided, drain/source silicide-blocked ESD NMOSFETs in a 65nm bulk CMOS technology
- Junjun Li
- David Alvarez
- et al.
- 2006
- IPFA 2006
PMOSFET-based ESD protection in 65nm bulk CMOS technology for improved external latchup robustness
- Junjun Li
- Robert Gauthier
- et al.
- 2005
- EOS/ESD 2005
A compact, timed-shutoff, MOSFET-based power clamp for on-chip ESD protection
- Junjun Li
- Robert Gauthier
- et al.
- 2004
- EOS/ESD 2004
Degradation of high-κ/metal gate nMOSFETs under ESD-like stress in a 32-nm technology
- Yang Yang
- Robert J. Gauthier
- et al.
- 2011
- IEEE T-DMR