Soft-error resilience of the IBM POWER6 processor
- Pia N. Sanda
- Jeffrey W. Kellington
- et al.
- 2008
- IBM J. Res. Dev
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35 results for Prabhakar Kudva
Phaser: Phased methodology for modeling the system-level effects of soft errors
- Jude A. Rivers
- Pradip Bose
- et al.
- 2008
- IBM J. Res. Dev
Power-aware microarchitecture: Design and modeling challenges for next-generation microprocessors
- David M. Brooks
- Pradip Bose
- et al.
- 2000
- IEEE Micro
Combinatorial cell design for CMOS libraries
- Frederik Beeftink
- Prabhakar Kudva
- et al.
- 2000
- Integration, the VLSI Journal
Peephole optimization of asynchronous macromodule networks
- Ganesh Gopalakrishnan
- Prabhakar Kudva
- et al.
- 1999
- IEEE Transactions on VLSI Systems