Matrix-matrix multiplication on a large register file architecture with indirection
- Dheeraj Sreedhar
- J.H. Derby
- et al.
- 2014
- HiPC 2014
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9 results for J.H. Derby
Processor architecture for software implementation of multi-sector G-RAKE receivers for HSUPA wireless infrastructure
- D. Sreedhar
- J.H. Derby
- et al.
- 2013
- ICASSP 2013
Architectural perspectives of future wireless base stations based on the IBM PowerEN™ processor
- Augusto Vega
- Pradip Bose
- et al.
- 2012
- HPCA 2012
Performance and power evaluation of an in-line accelerator
- Alejandro Rico
- Jeff H. Derby
- et al.
- 2010
- CF 2010
Compiling for an indirect vector register architecture
- Dorit Nuzman
- Mircea Namolaru
- et al.
- 2008
- CF 2008
VICTORIA - VMX indirect compute technology oriented towards in-line acceleration
- Jeff H. Derby
- Robert K. Montoye
- et al.
- 2006
- CF 2006
A high-performance embedded DSP core with novel SIMD features
- Jeff H. Derby
- Jaime H. Moreno
- 2003
- ICASSP 2003
An innovative low-power high-performance programmable signal processor for digital communications
- Jaime H. Moreno
- Victor Zyuban
- et al.
- 2003
- IBM J. Res. Dev
A critique of atm from a data communications perspective
- Israel Cidon
- Jeff Derby
- et al.
- 1992
- Journal of High Speed Networks