22 nm technology compatible fully functional 0.1 μm 2 6T-sram cell
- B. Haran
- A. Kumar
- et al.
- 2008
- IEDM 2008
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10 results for Ryoung-Han Kim
Comparison of left and right side line edge roughness in lithography
- Lei Sun
- Nicole Saulnier
- et al.
- 2016
- SPIE Advanced Lithography 2016
Towards electrical testable soi devices using directed self-assembly for fin formation
- Chi Chun Liu
- Cristina Estrada-Raygoza
- et al.
- 2014
- SPIE Advanced Lithography 2014
Spacer-defined double patterning for 20-nm and beyond logic BEOL technology
- Ryoung-Han Kim
- Chiew-Seng Koay
- et al.
- 2011
- SPIE Advanced Lithography 2011
Qualification, monitoring, and integration into a production environment of the world's first fully programmable illuminator
- Gregory McIntyre
- Daniel Corliss
- et al.
- 2011
- SPIE Advanced Lithography 2011
A 0.063 μm2 FinFET SRAM cell demonstration with conventional lithography using a novel integration scheme with aggressively scaled fin and gate pitch
- Veeraraghvan S. Basker
- Theodorus E. Standaert
- et al.
- 2010
- VLSI Technology 2010
Spacer defined double patterning for sub-72 nm pitch logic technology
- Ryoung-Han Kim
- Erin McLellan
- et al.
- 2010
- SPIE Advanced Lithography 2010
22 nm technology node active layer patterning for planar transistor devices
- Ryoung-Han Kim
- Steven Holmes
- et al.
- 2009
- SPIE Advanced Lithography 2009
Overcoming the challenges of 22-nm node patterning through litho-design co-optimization
- Martin Burkharde
- J.C. Arnold
- et al.
- 2009
- SPIE Advanced Lithography 2009
22-nm-node technology active-layer patterning for planar transistor devices
- Ryoung-Han Kim
- Steven Holmes
- et al.
- 2010
- J. Micro/Nanolithogr. MEMS MOEMS