High performance extremely thin SOI (ETSOI) hybrid CMOS with Si channel NFET and strained SiGe channel PFET
- K. Cheng
- A. Khakifirooz
- et al.
- 2012
- IEDM 2012
Publications
Date
Featured collections
Popular topics
7 results for Sebastian Naczas
Process trace analytics for process development
- Robert J. Baseman
- Fateh A. Tipu
- et al.
- 2021
- SPIE Advanced Lithography 2021
BEOL compatible high-capacitance MIMCAP structure using a novel high k material
- P. Jamison
- John Massey
- et al.
- 2020
- IMCS 2020
Bottom oxidation through STI (BOTS) - A novel approach to fabricate dielectric isolated FinFETs on bulk substrates
- K. Cheng
- S.-C. Seo
- et al.
- 2014
- VLSI Technology 2014
Strain engineered extremely thin SOI (ETSOI) for high-performance CMOS
- A. Khakifirooz
- Kangguo Cheng
- et al.
- 2012
- VLSI Technology 2012
ETSOI CMOS for system-on-chip applications featuring 22nm gate length, sub-100nm gate pitch, and 0.08μm2 SRAM cell
- Kangguo Cheng
- A. Khakifirooz
- et al.
- 2011
- VLSI Technology 2011
ETSOI CMOS for system-on-chip applications featuring 22nm gate length, sub-100nm gate pitch, and 0.08μm2 SRAM cell
- Kangguo Cheng
- A. Khakifirooz
- et al.
- 2011
- VLSI Circuits 2011