Reducing time dependent line to line leakage following post CMP clean
- Donald F. Canaperi
- Satyavolu S. Papa Rao
- et al.
- 2010
- MRS Online Proceedings Library
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27 results for T. Levin
Fully depleted extremely thin SOI technology fabricated by a novel integration scheme featuring implant-free, zero-silicon-loss, and faceted raised source/drain
- K. Cheng
- A. Khakifirooz
- et al.
- 2009
- VLSI Technology 2009
Copper contact metallization for 22 nm and beyond
- Soon-Cheon Seo
- Chih-Chao Yang
- et al.
- 2009
- IITC 2009
Stress migration lifetime for Cu interconnects with CoWP-only cap
- Jeffrey P. Gambino
- Christy L. Johnson
- et al.
- 2006
- IEEE T-DMR
Yield learning methodologies and failure isolation in ring oscillator circuit for CMOS technology research
- Victor Chan
- Kangguo Cheng
- et al.
- 2019
- IEEE Trans Semicond Manuf
Quantitative coherent diffractive imaging of an integrated circuit at a spatial resolution of 20 nm
- Brian Abbey
- Garth J. Williams
- et al.
- 2008
- Applied Physics Letters
Imaging material components of an integrated circuit interconnect
- Zachary H. Levine
- Steven Grantham
- et al.
- 2003
- Journal of Applied Physics