Full Bottom Dielectric Isolation to Enable Stacked Nanosheet Transistor for Low Power and High Performance Applications
- J. Zhang
- S. Pancharatnam
- et al.
- 2019
- IEDM 2019
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3 results for Koji Watanabe
Mechanism for leakage reduction by la incorporation in a HfO 2SiO2Si gate stack
- Kenzo Manabe
- Koji Watanabe
- et al.
- 2013
- IEEE Electron Device Letters
Full metal gate with borderless contact for 14 nm and beyond
- Soon-Cheon Seo
- L.F. Edge
- et al.
- 2011
- VLSI Technology 2011