Band edge high-K /metal gate n-MOSFETs using ultra thin capping layers
- V.K. Paruchuri
- V. Narayanan
- et al.
- 2007
- VLSI-TSA 2007
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53 results for Tze-Chiang Chen
Band-edge high-performance high-κ /metal gate n-MOSFETs using cap layers containing group IIA and IIIB elements with gate-first processing for 45 nm and beyond
- V. Narayanan
- V.K. Paruchuri
- et al.
- 2006
- VLSI Technology 2006
Mega-challenges for nano-silicon technology
- Tze-Chiang Chen
- 2006
- NANO 2006
Overcoming research challenges for CMOS scaling: Industry directions
- Tze-Chiang Chen
- 2006
- ICSICT 2006
A 90nm dual damascene hybrid (organic / inorganic) low-k - Copper BEOL integration scheme
- T. Dalton
- A. Cowley
- et al.
- 2003
- ADMETA 2003
Design of a high performance PD SOI for the 0.18 μm technology generation
- M. Sherony
- S.-H. Lo
- et al.
- 2000
- ICM 2000
Partially depleted silicon-on-insulator (SOI): A device design/modeling and circuit perspective
- F. Assaderaghi
- G. Shahidi
- et al.
- 2000
- ICM 2000
Partially-depleted SOI compact model - formulation and parameter extraction
- S.K.H. Fung
- L. Wagner
- et al.
- 2000
- VLSI Technology 2000
Integration of copper and fluorosilicate glass for 0.18 μm interconnections
- E. Barth
- T. Ivers
- et al.
- 2000
- IITC 2000
Characteristics of vertical p-channel MOSFETs for high density circuit application
- D.S. Wen
- W.H. Chang
- et al.
- 1991
- VLSI-TSA 1991