0.25μm low power CMOS devices and circuits from 8 inch SOI materials
- B. Chen
- A.S. Yapsir
- et al.
- 1995
- ICSICT 1995
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105 results for Ghavam Shahidi
CMOS technology for low voltage/low power applications
- B. Davari
- R.H. Dennard
- et al.
- 1994
- CICC 1994
SOI technology outlook for sub-0.25 μm CMOS, challenges and opportunities
- B. Davari
- H.J. Hovel
- et al.
- 1993
- IEEE International SOI Conference 1993
SOI technology outlook for Sub-0.25 μm CMOS, challenges and opportunities
- Bijan Davari
- Ghavam G. Shahidi
- 1993
- ESSDERC 1993
A room temperature 0.1 μm CMOS on SOI
- G. Shahidi
- C. Blair
- et al.
- 1993
- VLSI Technology 1993
A high performance 0.15 μm CMOS
- G. Shahidi
- J. Warnock
- et al.
- 1993
- VLSI Technology 1993
Understanding of enhanced sensitivity to Hot Carrier degradation in drain engineered n-FETs
- C.C.-H. Hsu
- B.S. Wu
- et al.
- 1992
- SSDM 1992
SOI: Opportunities and challenges for Sub-0.25 μu VLSI
- Ghavam G. Shahidi
- 1992
- BCTM 1992
A high performance low temperature 0.3 μm CMOS on SIMOX
- G. Shahidi
- B. Bucclot
- et al.
- 1992
- VLSI Technology 1992
A high performance BiCMOS technology using 0.25 μm CMOS and double poly 47 GHz bipolar
- G. Shahidi
- J. Warnock
- et al.
- 1992
- VLSI Technology 1992