Optimized scaling of diode array design for 32NM node phase change memory
- Kailiang Lu
- Bipin Rajendran
- et al.
- 2008
- VLSI-TSA 2008
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36 results for Bipin Rajendran
Phase change memory - Opportunities and challenges
- Bipin Rajendran
- Hsiang-Lan Lung
- et al.
- 2007
- IWPSD 2007
Write strategies for 2 and 4-bit multi-level phase-change memory
- T. Nirschl
- J.B. Philipp
- et al.
- 2007
- IEDM 2007
Novel lithography-independent pore phase change memory
- M. Breitwisch
- T. Nirschl
- et al.
- 2007
- VLSI Technology 2007
Low thermal budget processing for sequential 3-D IC fabrication
- Bipin Rajendran
- Rohit S. Shenoy
- et al.
- 2007
- IEEE Transactions on Electron Devices
CMOS transistor processing compatible with monolithic 3-D integration
- B. Rajendran
- R.S. Shenoy
- et al.
- 2005
- VMIC 2005