Synchronous interlocked pipelines
- Hans M. Jacobson
- Prabhakar N. Kudva
- et al.
- 2002
- ASYNC 2002
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5 results for Chris J. Myers
Verification of delayed-reset domino circuits using ATACS
- Wendy Belluomini
- Chris J. Myers
- et al.
- 1999
- ASYNC 1999
SBML Level 3: an extensible format for the exchange and reuse of biological models
- Sarah M. Keating
- Dagmar Waltemath
- et al.
- 2020
- Molecular Systems Biology
Timed circuit verification using TEL structures
- Wendy Belluomini
- Chris J. Myers
- et al.
- 2001
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Timed state space exploration using POSET's
- Wendy Belluomini
- Chris J. Myers
- 2000
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems