Competitive and cost effective high-k based 28nm CMOS technology for low power applicationsF. ArnaudA. Theanet al.2009IEDM 2009
High performance 65 nm SOI technology with dual stress liner and low capacitance SRAM cellE. LeobandungH. Nayakamaet al.2005VLSI Technology 2005
Novel high-performance analog devices for advanced low-power high-k metal gate complementary metal-oxide-semiconductor technologyJin-Ping HanTakashi Shimizuet al.2011Japanese Journal of Applied Physics