A highly digital 0.5-to-4Gb/s 1.9mW/Gb/s serial-link transceiver using current-recycling in 90nm CMOS
- Rajesh Inti
- Amr Elshazly
- et al.
- 2011
- ISSCC 2011
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2 results for Pavan Kumar Hanumolu
Area efficient phase calibration of a 1.6 GHz multiphase DLL
- Ankur Agrawal
- Pavan Kumar Hanumolu
- et al.
- 2011
- CICC 2011