A 1.8-pJ/bit 16x16-Gb/s source synchronous parallel interface in 32nm SOI CMOS with receiver redundancy for link recalibration
- Timothy O. Dickson
- Yong Liu
- et al.
- 2015
- CICC 2015
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23 results for Daniel Friedman
Crypto anchors
- Venkat Balagurusamy
- Cyril Cabral
- et al.
- 2019
- IBM J. Res. Dev
A 7.5 GS/s flash ADC and a 10.24 GS/s time-interleaved ADC for backplane receivers in 65 nm CMOS
- Hayun Chung
- Zeynep Toprak-Deniz
- et al.
- 2015
- Analog Integr Circuits Signal Process