Modeling of a Bubble-Memory Organization with Self-Checking Translators to Achieve High Reliability
- Willard G. Bouricius
- William C. Carter
- et al.
- 1973
- IEEE TC
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5 results for D.C. Jessep
Reliability Modeling for Fault-Tolerant Computers
- Willard G. Bouricius
- W.C. Carter
- et al.
- 1971
- IEEE TC
Logic Design for Dynamic and Interactive Recovery
- W.C. Carter
- D.C. Jessep
- et al.
- 1971
- IEEE TC
A Simple Self-Testing Decoder Checking Circuit
- W.C. Carter
- D.C. Jessep
- et al.
- 1971
- IEEE TC
An Optimal NOR Logic Element Using Nonlinear Resistance
- Martin J. Geisler
- Donald C. Jessep
- 1970
- IEEE T-ED