Power-efficient decision-feedback equalizers for multi-Gb/s CMOS serial links (invited)
- John F. Bulzacchelli
- Alexander V. Rylyakov
- et al.
- 2007
- RFIC 2007
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60 results for John F. Bulzacchelli
A low-power receiver with switched-capacitor summation DFE
- Azita Emami-Neyestanak
- Aida Varzaghani
- et al.
- 2006
- VLSI Circuits 2006
Development of superconducting bandpass delta-sigma analog-to-digital converter
- John F. Bulzacchelli
- Hae-Seung Lee
- et al.
- 2004
- Physica C: Superconductivity and its Applications
Segmented correlation measurements on superconducting bandpass delta-sigma modulator with and without input tone
- John F. Bulzacchelli
- Hae-Seung Lee
- et al.
- 2003
- Supercond Sci Technol
Experimental demonstration of superconducting bandpass delta-sigma modulator
- John F. Bulzacchelli
- Hae-Seung Lee
- et al.
- 2003
- IEEE TAS
Superconducting bandpass ΔΣ modulator with 2.23-GHz center frequency and 42.6-GHz sampling rate
- John F. Bulzacchelli
- Hae-Seung Lee
- et al.
- 2002
- IEEE Journal of Solid-State Circuits
Analog-to-digital converter testing method based on segmented correlations
- John F. Bulzacchelli
- Hae-Seung Lee
- et al.
- 2001
- IEEE TAS
Superconducting VLSI Logic Cell Library Using DC-Powered Clockless Dynamic SFQ Gates and ASIC-Style Layout Template
- Sergey Rylov
- Matthew Beck
- et al.
- 2023
- IEEE TAS
A 7.5 GS/s flash ADC and a 10.24 GS/s time-interleaved ADC for backplane receivers in 65 nm CMOS
- Hayun Chung
- Zeynep Toprak-Deniz
- et al.
- 2015
- Analog Integr Circuits Signal Process
Direct measurement of jitter in a JTL
- Y.-K.-K. Fung
- G.W. Gibson
- et al.
- 2013
- IEEE TAS