Circuit Simulation of Nanotechnology Devices with Non-monotonie I-V CharacteristicsJiayong LeLarry Pileggiet al.2003ICCAD 2003
Design and CAD Challenges in sub-90nm CMOS TechnologiesKerry BernsteinChing-Te Chuanget al.2003ICCAD 2003
A Heuristic to Determine Low Leakage Sleep State Vectors for CMOS Combinational CircuitsRahul M. RaoFrank Liuet al.2003ICCAD 2003