The design and implementation of a first-generation CELL Processor
- D.C. Pham
- S. Asano
- et al.
- 2005
- ISSCC 2005
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6 results at ISSCC 2005
The design and implementation of a first-generation CELL processor
- D.C. Pham
- S. Asano
- et al.
- 2005
- ISSCC 2005
A 6.4Gb/s CMOS SerDes core with feedforward and decision-feedback equalization
- M. Sorna
- T. Beukema
- et al.
- 2005
- ISSCC 2005
A 20Gb/s VCSEL driver with pre-emphasis and regulated output impedance in 0.13μm CMOS
- Daniel Kucharski
- Young Kwark
- et al.
- 2005
- ISSCC 2005
A 20Gb/s VCSEL driver with pre-emphasis and regulated output impedance in 0.13μm CMOS
- Daniel Kucharski
- Young Kwark
- et al.
- 2005
- ISSCC 2005
A 6.4Gb/s CMOS SerDes core with feedforward and decision-feedback equalization
- M. Sorna
- T. Beukema
- et al.
- 2005
- ISSCC 2005