A 1.2V 15.6mW 81GHz 2:1 static CML frequency divider with a band-pass load in a 90nm SOI CMOS technology
- Jean-Olivier Plouchart
- Daiek Kim
- et al.
- 2007
- CSICS 2007
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A low-power 40 Gbit/s receiver circuit based on full-swing CMOS-style clocking
- Thomas Toifl
- Christian Menolfi
- et al.
- 2007
- CSICS 2007