Sub-picosecond jitter SiGe BiCMOS transmit and receive PLLs for 12.5 Gbaud serial data communication
- D. Friedman
- M. Meghelli
- et al.
- 2000
- VLSI Circuits 2000
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4 results at VLSI Circuits 2000
2 GHz cycle, 430 ps access time 34 Kb L1 directory SRAM in 1.5 V, 0.18 μm CMOS bulk technology
- R.V. Joshi
- S.P. Kowalczyk
- et al.
- 2000
- VLSI Circuits 2000
1 GHz leading zero anticipator using independent sign-bit determination logic
- Kyung Tek Lee
- K. Nowka
- 2000
- VLSI Circuits 2000
1.6 ns access, 1 GHz two-way set-predicted and sum-indexed 64-kByte data cache
- Joel Silberman
- Naoaki Aoki
- et al.
- 2000
- VLSI Circuits 2000