Power reduction by aggressive synthesis design space exploration
- Matthew M. Ziegler
- George D. Gristede
- et al.
- 2013
- ISLPED 2013
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4 results at ISLPED 2013
A pipeline architecture with 1-cycle timing error correction for low voltage operations
- Insup Shin
- Jae-Joon Kim
- et al.
- 2013
- ISLPED 2013
Breaking the boundary for whole-system performance optimization of big data
- Yan Li
- Kun Wang
- et al.
- 2013
- ISLPED 2013
Single-cycle, pulse-shaped critical path monitor in the POWER7+ microprocessor
- Alan J. Drake
- Michael S. Floyd
- et al.
- 2013
- ISLPED 2013