Large-scale (512kbit) integration of multilayer-ready access-devices based on Mixed-Ionic-Electronic-Conduction (MIEC) at 100% yield
- G.W. Burr
- K. Virwani
- et al.
- 2012
- VLSI Technology 2012
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8 results at VLSI Technology 2012
High performance bulk planar 20nm CMOS technology for low power mobile applications
- Huiling Shang
- Sameer Jain
- et al.
- 2012
- VLSI Technology 2012
Strain engineered extremely thin SOI (ETSOI) for high-performance CMOS
- A. Khakifirooz
- Kangguo Cheng
- et al.
- 2012
- VLSI Technology 2012
Advanced modeling and optimization of high performance 32nm HKMG SOI CMOS for RF/analog SoC applications
- Sungjae Lee
- J. Johnson
- et al.
- 2012
- VLSI Technology 2012
A simple new write scheme for low latency operation of phase change memory
- Y.Y. Lin
- Y.C. Chen
- et al.
- 2012
- VLSI Technology 2012
Channel doping impact on FinFETs for 22nm and beyond
- Chung-Hsun Lin
- R. Kambhampati
- et al.
- 2012
- VLSI Technology 2012
Voltage and temperature dependence of random telegraph noise in highly scaled HKMG ETSOI nFETs and its impact on logic delay uncertainty
- H. Miki
- M. Yamaoka
- et al.
- 2012
- VLSI Technology 2012
A novel low resistance gate fill for extreme gate length scaling at 20nm and beyond for gate-last high-k/metal gate CMOS technology
- U. Kwon
- K. Wong
- et al.
- 2012
- VLSI Technology 2012