A 512Mb phase-change memory (PCM) in 90nm CMOS achieving 2b/cell

Abstract

The PCM memory chip demonstrates the key features for MLC on a relevant scale (256Mcells). Given its versatility in terms of programming pulse shape and timing, closed-loop algorithms, and the wide cell resistance range that the ADC can accommodate, the chip also appears as an ideal characterization tool in the development of PCM technology for nonvolatile MLC. For example, the flexibility allows the on-chip exploration of drift?resilient schemes, critical for MLC. In addition to its capability for technology benchmarking, the chip also serves as a template for future PCM memory chips targeting more than 2b/cell by introducing key circuit blocks such as fast BL voltage regulator and ADC auto range. © 2011 JSAP (Japan Society of Applied Physi.