A circuit-sensitive methodology for evaluating substrate noise

This paper proposes a practical methodology for analyzing the impact of substrate noise in any sensitive circuit. From this methodology, a figure of merit (FOM) is presented which can be used to compute the sensitivity of a circuit node to substrate noise. Simulations of a CMOS LNA prove the usefulness of this approach as a expeditious, yet effective means for determining the most substrate noise-sensitive portions of a circuit. © 2005 IEEE.