Laura Bégon-Lours, Mattia Halter, et al.
MRS Spring Meeting 2023
A new Ge-GST embedded PCM cell architecture, optimized for Deep Neural Network (DNN) acceleration, is presented. Its integration flow is discussed, and its dimensions are optimized through TCAD simulations. Extensive electrical characterization of conductance levels is performed to assess analog programming and level stability over time and temperature. Simulations of large DNN demonstrate superior performance of the optimized cell when compared with standard Wall structure ePCM. Finally, functionality on a large statistic is demonstrated with the validation of a test-vehicle showing good process yield. Silicon implementation of a NN proves the excellent A-IMC characteristics of this architecture.
Laura Bégon-Lours, Mattia Halter, et al.
MRS Spring Meeting 2023
Geoffrey Burr, Sidney Tsai, et al.
CICC 2025
Yayue Hou, Hsinyu Tsai, et al.
DATE 2025
Ying Zhou, Gi-Joon Nam, et al.
DAC 2023