Bias-stress-induced stretched-exponential time dependence of charge injection and trapping in amorphous silicon thin-film transistors

We investigate the threshold voltage instabilities in nitride/oxide dual gate dielectric hydrogenated amorphous silicon (a-Si) thin-film transistors as a function of stress time, stress temperature and stress bias. The measured threshold voltage shifts are quantitatively modelled with a stretched-exponential stress time dependence where the stretched-exponent β cannot be related to the β = TST/T0 but rather to β ≈ TST/T0* - β0 for TST ≤ 80°C; for TST ≥ 80°C the β is stress temperature independent. We have also found that β is stress gate bias independent. These findings are explained with a multiple trapping model with states located at the a-Si/a-SiNx interface and in the a-SiNx transitional layer close to the interface.