Challenges of 10 nm and 7 nm CMOS for server and mobile applications

Abstract

FINFET technology is now available on cutting edge mobile devices starting at the 16/14nm nodes. As the industry ramps toward 7nm, there will be intense pressure on density to counter the added cost driven by the adoption of more complex multiple patterning techniques for the FIN, Gate, various Middle Of Line (MOL) architectures, and Back End Of Line (BEOL) wiring levels. The need to reduce doping in the FINFETs will drive Multi-Workfunction solutions for same gate polarity. Likewise, the need for transistor performance will lead to new channel materials. Novel materials will be needed to reduce parasitic capacitance and resistance in the MOL and BEOL levels. Some incarnations of the 10nm node will be called "7nm" just as some variants of 20nm node were called 16/14, but the true "7nm" node circuit densities will require the next generation of lithography - Extreme Ultra Violet (EUV) at 13.5nm wavelength. The key to adoption in the mobile space is the cost of the chip which is challenged by the need for novel cost intensive patterning techniques. The key to adoption in the server space will be ability to get more performance at constant chip power given the increased wiring parasitics. In all cases, novel materials will be needed to get to mature 7nm nodes.