Aditya Bansal, Keunwoo Kim, et al.
ICICDT 2007
A 45nm SOI completely digital on-chip circuit to measure local random variation of FET currents is presented. The design uses an array of independently selectable upper devices arranged in a stacked configuration with a single bottom device. Using a voltage-to-frequency converter and an on-chip counter, the circuit eliminates analog current measurements and enables rapid, all-digital measurement of single FET variability. ©2008 IEEE.
Aditya Bansal, Keunwoo Kim, et al.
ICICDT 2007
Shu-Jen Han, Dharmendar Reddy, et al.
ACS Nano
C. Zhou, Keith A. Jenkins, et al.
IRPS 2018
Kyu-Hyoun Kim, Paul W. Coteus, et al.
ISSCC 2008