Thomas Toifl, Christian Menolfi, et al.
VLSI Circuits 2011
Paper
Design methodology for a large communication chip
Abstract
Smart chip is a large communication chip with standard-based communication interfaces, multiple clock domains, and mixed-signal components for line interfacing. This chip has been developed by focusing mainly on general design aspects.
Related
Peter H. Baechtold, Michael P. Beakes, et al.
IEEE Journal of Solid-State Circuits
Carsten Albrecht, Rainer Hagenau, et al.
ARCS 2004
Peter H. Baechtold, Michael P. Beakes, et al.
IEEE Journal of Solid-State Circuits