Conference paper
Inductance analysis of on-chip interconnects
Sandip Kundu, Uttam Ghoshal
EDTC 1997
Testing screens for good chips However, when test fall out is high (low yield) it becomes necessary to diagnose faults so that the manufacturing process or physical design can be fixed to improve yield. Several scan based diagnostic schemes are used in industry. They work when the scan chain itself is fault free. In this paper we describe a diagnosis system that can diagnose faults in a scan chain. © 1994 IEEE
Sandip Kundu, Uttam Ghoshal
EDTC 1997
Sandip Kundu
Integration, the VLSI Journal
Sandip Kundu
Integration, the VLSI Journal
Sandip Kundu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems