Enabling High-Performance DNN Inference Accelerators Using Non-Volatile Analog Memory (Invited)

Abstract

Non-volatile analog memory and in-memory computing have great potential to enable high-performance Deep Neural Network (DNN) inference accelerators with significantly better performance and efficiency than digital processors. Analog Phase Change Memory (PCM) arrays, combined with CMOS circuitry, can achieve software-equivalent accuracy and high energy efficiency. At the same time, non-ideal device characteristics of analog memories have to be carefully addressed. This paper reviews some novel techniques to reduce the impact of write noise, variability, and drift of PCMs to enable high-performance inference accelerators, as demonstrated in Long-Short Term Memory (LSTM) networks.