Fully on-chip MAC at 14nm enabled by accurate row-wise programming of PCM-based weights and parallel vector-transport in duration-format
- P. Narayanan
- S. Ambrogio
- et al.
- 2021
- VLSI 2021
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173 results for Geoffrey W. Burr
Reducing the Impact of Phase-Change Memory Conductance Drift on the Inference of large-scale Hardware Neural Networks
- Stefano Ambrogio
- M. Gallot
- et al.
- 2019
- IEDM 2019
Circuit-level benchmarking of access devices for resistive nonvolatile memory arrays
- Pritish Narayanan
- Geoffrey W. Burr
- et al.
- 2014
- IEDM 2014
Experimental demonstration and tolerancing of a large-scale neural network (165,000 synapses), using phase-change memory as the synaptic weight element
- Geoffrey W. Burr
- Robert M. Shelby
- et al.
- 2014
- IEDM 2014
Large-scale neural networks implemented with non-volatile memory as the synaptic weight element: Comparative performance analysis (accuracy, speed, and power)
- Geoffrey W. Burr
- Pritish Narayanan
- et al.
- 2015
- IEDM 2015
NVM neuromorphic core with 64k-cell (256-by-256) phase change memory synaptic array with on-chip neuron circuits for continuous in-situ learning
- Sangbum Kim
- Masatoshi Ishii
- et al.
- 2015
- IEDM 2015
Mixed-ionic-electronic-conduction (MIEC)-based access devices for 3D Multilayer Crosspoint Memory
- Kumar Virwani
- Geoffrey W. Burr
- et al.
- 2014
- MRS Fall Meeting 2014
Sub-30nm scaling and high-speed operation of fully-confined Access-Devices for 3D crosspoint memory based on mixed-ionic-electronic-conduction (MIEC) materials
- K. Virwani
- G.W. Burr
- et al.
- 2012
- IEDM 2012
Voltage polarity effects in GST-based phase change memory: Physical origins and implications
- A. Padilla
- G.W. Burr
- et al.
- 2010
- IEDM 2010
Analytical model for RESET operation of phase change memory
- B. Rajendran
- J. Karidis
- et al.
- 2008
- IEDM 2008