Daniel Brand, Pitro Zafiropulo
Journal of the ACM
Simulation is today the most common form of verification. One disadvantage of simulation is the excessive number of tests needed for complete coverage. However, as will be shown, the number of tests may be substantially reduced if test case generation is combined with a structural analysis. The resulting set of test cases for exhaustive simulation may be smaller than exponential, which might make exhaustive simulation feasible. Even if the set of test cases is still too large, choosing tests from this reduced set results in better coverage than otherwise. © 1993 IEEE
Daniel Brand, Pitro Zafiropulo
Journal of the ACM
Naigang Wang, Jungwook Choi, et al.
NeurIPS 2018
Daniel Brand
IEEE TC
Daniel Brand, Vijay S. Iyengar
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems