Graded or stepped energy band-gap-insulator MIS structures (GI-MIS or SI-MIS)

Abstract

A new concept in nonvolatile semiconductor memory using graded or stepped energy band-gap insulators under the gate electrode of a metal-insulator- semiconductor type structure is described. With the graded or stepped insulator, electrons or holes can be injected from the gate electrode at low to moderate applied fields. These carriers then flow under the applied voltage bias into a wide energy band-gap insulator (such as SiO2) with a purposely introduced charge trapping layer (such as ion-implanted As, deposited W, or deposited polycrystalline Si). This trapping layer captures and stores electrons ("write" operation) or holes ("erase" operation) with as close to 100% efficiency as possible. Because of the larger energy barriers at the semiconductor (such as Si) interface with the wide energy band-gap insulator (such as SiO2), few carriers of the opposite sign are injected. Therefore, the substrate Si-SiO2 interface, for instance, can be used strictly for charge sensing ("read" operation) such as in a field-effect transistor. Several experimental examples are mentioned. A detailed description of stepped insulator structures using thin Si3N 4SiO2 (≈5.2 eV band gap) layers on (≈9 eV band gap) with an ion-implanted As region is given. Some advantages of these structures over other nonvolatile semiconductor memory devices are discussed.