On efficient Viterbi decoding for hidden semi-Markov models
Ritendra Datta, Jianying Hu, et al.
ICPR 2008
Automatic inspection has become an essential part of manufacturing technology for integrated circuit (IC) chips, but three trends in the geometries of ICs and the chips that they comprise have serious implications for inspection, making further advances in technology challenging. The individual devices (e.g., transistors) are becoming smaller, with the smallest features on some advanced products already crossing the optical resolution threshold; the chip areas are becoming larger; and the chips consist of more layers and undergo more processing steps. Not only are the smallest defects more difficult to detect due to the optical resolution limit, they are also much rarer because the tolerable defect density decreases as the chip area increases. This paper addresses automated IC inspection, surveying recent advances and future challenges. An overview of all inspection on IC chips during the manufacturing process is followed by a detailed discussion of pattern defect inspection (PDI) and its unique requirements, such as detection probability, false alarm rate, throughput, and minimum defect size. The core material of the paper consists of a discussion of approaches and systems for PDI, emphasizing recent developments, but reviewing older work to set the proper context. Both work reported in the literature and commercial systems are considered. © 1995 Springer-Verlag.
Ritendra Datta, Jianying Hu, et al.
ICPR 2008
Hagen Soltau, Lidia Mangu, et al.
ASRU 2011
N.C. Narendra, Umesh Bellur, et al.
Middleware 2005
Hisashi Kashima, Tsuyoshi Id́e, et al.
IEICE Transactions on Information and Systems