RF SOI switch FET design and modeling tradeoffs for GSM applications

Abstract

A single-pole double-throw novel switch device in 0.18μm SOI complementary metal-oxide semiconductor (CMOS) process is developed for 0.9 Ghz wireless GSM systems. The layout of the device is optimized keeping in mind the parameters of interest for the RF switch. A subcircuit model, with the standard surface potential (PSP) model as the intrinsic FET model along with the parasitic elements is built to predict the Ron and Coff of the switch. The measured data agrees well with the model. The eight FET stacked switch achieved an Ron of 2.5 ohms and an Coff of 180 fF. © 2010 IEEE.