U. Wieser, U. Kunze, et al.
Physica E: Low-Dimensional Systems and Nanostructures
The modifications to the intrinsic and extrinsic aspects of state-of-the-art Si CMOS technology are presented. Measured circuit performance of n-type Si/SiGe FETs proves that a factor of 10 in power-delay is possible. Microwave performance of both n-type and p-type FETs based on strained Si/SiGe also corroborate the result of measured circuit performance. Simulated circuit performance of 0.1 μm Si/SiGe CMOS based on the experimental results is presented and compared to bulk Si CMOS and silicon on insulator technology.
U. Wieser, U. Kunze, et al.
Physica E: Low-Dimensional Systems and Nanostructures
K. Ismail, M. Burkhardt, et al.
Applied Physics Letters
M. Arafa, P. Fay, et al.
Electronics Letters
K. Ismail, T.P. Smith III, et al.
Applied Physics Letters