Erich P. Stuntebeck, John S. Davis II, et al.
HotMobile 2008
The heart of an IBM SP2TM system is the High-Performance Switch, which is a low-latency, high-bandwidth switching network that binds together RISC System/6000qq processors. The switch incorporates a unique combination of topology and architectural features to scale aggregate bandwidth, enhance reliability, and simplify cabling. It is a bidirectional multistage interconnect subsystem driven by a common oscillator, and delivers both data and service packets over the same links. Switching elements contain a dynamically allocated shared buffer for storing blocked packet flits. The switch is constructed primarily from switching elements (the Vulcan switch chip) and adapters (the SP2 communication adapter). The SP2 communication adapter uses a variety of techniques to improve bandwidth and offload communication tasks from the node processor. This paper examines the switch architecture and presents an overview of its support software.
Erich P. Stuntebeck, John S. Davis II, et al.
HotMobile 2008
Inbal Ronen, Elad Shahar, et al.
SIGIR 2009
Yvonne Anne Pignolet, Stefan Schmid, et al.
Discrete Mathematics and Theoretical Computer Science
Corneliu Constantinescu
SPIE Optical Engineering + Applications 2009