Jae-Sun Seo, Bernard Brezzo, et al.
CICC 2011
The goal of neuromorphic engineering is to build electronic systems that mimic the ability of the brain to perform fuzzy, fault-tolerant, and stochastic computation, without sacrificing either its space or power efficiency. In this paper, we determine the operating characteristics of novel nanoscale devices that could be used to fabricate such systems. We also compare the performance metrics of a million neuron learning system based on these nanoscale devices with an equivalent implementation that is entirely based on end-of-scaling digital CMOS technology and determine the technology targets to be satisfied by these new devices. We show that neuromorphic systems based on new nanoscale devices can potentially improve density and power consumption by at least a factor of 10, as compared with conventional CMOS implementations. © 1963-2012 IEEE.
Jae-Sun Seo, Bernard Brezzo, et al.
CICC 2011
Xiaoxiong Gu, Joel A. Silberman, et al.
IEEE Transactions on CPMT
Suyoung Bang, Jae-Sun Seo, et al.
VLSI Circuits 2015
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ICSICT 2022