Conference paper
Investigations of silicon nano-crystal floating gate memories
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
This work focuses on the quality of epitaxial silicon deposited when the total thickness grown is in the range of 0.5-0.9 μm from the initial physical interface. Shallow junctions were fabricated to evaluate device potential of the thin films. Defect levels were evaluated. The ability to reproduce doping profiles was also evaluated. The studies have shown that the epitaxial silicon deposited to 0.5 μm thickness is suitable for device fabrication. © 1984, The Electrochemical Society, Inc. All rights reserved.
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
Corneliu Constantinescu
SPIE Optical Engineering + Applications 2009
Dipanjan Gope, Albert E. Ruehli, et al.
IEEE T-MTT
J.H. Kaufman, Owen R. Melroy, et al.
Synthetic Metals