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SOI FinFET soft error upset susceptibility and analysis
Phil Oldiges, Ken Rodbell, et al.
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Conference paper
Technique for Asymmetric Source/Drain Resistance Extraction on a Single Gate Length MOSFET
Abstract
A simple inline measurement technique for extracting the individual resistance components of the source, drain, and channel on a single MOSFET device using DC measurements is proposed. Modeling data is used to prove the efficacy of the technique. This method can be applied to symmetric or asymmetric devices.
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